Systems Validation Engineer, L10

About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

You will be the L10 System Validation Engineer, defining what it means for the accelerator platform to be production-ready. You'll be responsible for building our Cluster Scale Memory subsystem and build the infrastructure to prove it. You'll personally drive the most critical issues from detection through root cause to verified fix.

Key Responsibilities

- Author and own the L10 system debug guide, serving as the definitive reference for factory failure analysis and debug teams.

- Own end-to-end escalation, debug, and resolution of L10 hardware failures across internal and field teams

- Develop and own L10 system debug guide to be used for the factory by the failure analysis / debug team.

- Own bring-up and integration across accelerator cards, interconnects (Retimers, C2C fabric), power (PSU, power integrity), and thermal domains.

- Lead system-level debug with no guaranteed starting point: hardware, firmware (BMC, BIOS, CPLD), and software all in scope simultaneously.

- Partner directly with CMs to validate incomplete systems, close coverage gaps, and gate production ramp.

- Build ad-hoc instrumentation, automation scripts, and debug workflows to extract signals from unstable, pre-spec systems.

- Run sustained workloads using real model variants under thermal and power stress

- Drive issue closure across cross-functional engineering teams: HW, FW, SW, thermal, power, and manufacturing.

- Represent validation readiness to leadership with crisp, data-backed assessments

You may be a go...