Senior Analog & Mixed-Signal Layout Design Engineer

Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. We are seeking a highly skilled High-speed SERDES IO PHY Layout designer with 5 - 9 years of experience. Apart from Serdes PHY Layout, the ideal candidate should have a strong background in analog/IO design principles, hands-on experience with layout tools, Automated PnR and a passion for solving challenging technical problems.Key Responsibilities:Develop and optimize Serdes PHY, analog and mixed-signal IC layouts, ensuring high performance and manufacturability.Collaborate with design engineers to understand design requirements and translate them into precise layouts.Strong experience in debugging DRC, ERC, LVS, EMIR and PERC issues independently.Work experience of block PnR to closely interact with physical design team ensuring area/timing/backend compatibility of custom blocks into the overall chip design.Identify and resolve layout-related issues, providing creative solutions to meet design specifications.Conduct layout reviews and provide technical feedback to improve layout practices and methodologies.Stay up-to-date with industry trends, tools, and technologies to continuously enhance layout processes. Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or a related field.5-10 years of experience in IO/Analog mixed-signal IC layout design and block level PnRProficiency in layout tools such as Cadence, Synopsys, or Mentor Graphics.Hands-on experience with custom layout design for various analog and IO circuits is required, including expertise in Bandgap references, LDOs, Clocking circuits, GPIOs, DDR IOs, and ESD circuits.Familiarity with custom digital layout (i.e. high speed logic paths).Knowledge of signal integrity issues (i.e. clock/data routes, differential routing, shielding).Strong understanding of analog/IO design principles, including  parasitic effects.Aware of layout techniques to mitigate ESD, latch-up...